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SIMPLE CLASSICAL THEORY

a. Linear Region, IDS - VDS characteristics

A cross-section of a MOSFET in the linear region is shown in figure 7.8. The shortening of the cross-section of the channel at the drain end is intentionally ignored. V{x) is the horizontal potential along the channel from the source to a point A at a distance x from the source. The distance x is measured along the channel, the length of which is L. Obviously, V(L) = VDS. The mobile charges, i.e. the electrons in the conduction band of Si, are the ones we have called Q„ in figure 7.4b. From the discussion in the previous section, we know that Q„ is substantial only for VGS > Vn„ i.e. Q„ ~ 0 below the threshold voltage. Below V, the applied voltage VGS mainly increases the width of the space charge layer in Si.

When a voltage Vos is applied to the device, as in figure 7.8, then it is safe according to the discussion above to assume that the mobile charges at the point A are proportional to (VGSV(x)- Vth) and we can write for Q„

A MOSFET in operation in the linear region

FIGURE 7.8 A MOSFET in operation in the linear region: geometry for the calculation of the current. The current IDS is then simply

where dQ is the differential charge in a differential volume element of length dx. Remembering that Q„ is charge per unit area we have

where W is the width of the device, i.e. the dimension perpendicular to the plane of figure 7.8. The differential time for the charge dQ to travel by the distance dx is

where vdr(x) is the electron drift velocity at x. If the electric field £ is low, the drift velocity can be put into the form vdr = p„£ where p„ is the mobility of the electrons. The latter is not equal to the bulk mobility, but it is approximately half the value of bulk mobility, because of interfacial scattering in the Si/Si02 interface. Taking into account that

and that the charge Q„ is negative, from equations 7.8-7.11 we get

Separating variables and integrating from the start to the end of the channel we have

Note that IDS has been taken outside the integral because it is constant along the channel. For values of Vos Vcs - V,/„ the term Vos can be neglected and this condition defines a more stringent condition for the extent of the linear region. We note that certain authors define a third intermediate region between the linear and the saturation one in which the quadratic term above is important.

b. Saturation Region I os — Vds characteristic

As noted previously, when pinch-off occurs the transistor enters the saturation region where the current increases at a very slow rate. Before examining the physical reasons for the near constancy of the current, we will obtain first an expression for the current similar to equation 7.13. We only need to find the value of Vos1 which separates the linear region from the saturation region. From equations 7.7 to 7.9, it is evident that pinch-off occurs the pinching at point (P) when

But V(x = P) = Vos7 by definition (irrespective of whether the point (P) is below the drain or has moved towards the source). Flence

Since V^1 denotes both the end of the linear region and the start of the saturation region, we can substitute in 7.13 for Vos = Vos‘ to get for the current in the saturation regime

Above this value of Ids' the Ids~Vds> characteristics show a small linear increase, see figure 7.6. This is due to the decrease of the length of the channel as Vos is increasing above Vos1 as shown in figure 7.7. Let this decrease be AL = xci,. Then the effective length of the channel Lejf = L-xci,. The current will be

where к = Ц„С. Since the small increase in Ids beyond Vos1 is almost linear in Vos we only need to define a constant for dIDS/dVDs. If we write

as a definition of VA, then the electrical characteristics for the entire saturation region can be written as

c. Physical explanation of the saturation region

In the previous section, we have already noted the apparent contradiction that the channel is completely pinched-off in the saturation region but the current remains almost constant and in fact even increases slightly. A consequence of the continuity equation is that if there is no charge accumulation, the current in a channel must be independent of the particular cross-section used to measure it. So, there cannot be a finite current in the non-pinched part of the channel and no current in the pinched part where there are no mobile carriers. The answer to this apparent dilemma is of course that the channel is not entirely pinched and a “residual channel”, i.e. a non- pinched one, is always present below the drain. The situation is depicted in figure 7.9 where it is shown that the channel consists of two parts; one non-pinched roughly below the source and over the gate and another residual roughly below the drain. The one below the drain has a very small but finite cross-section that can sustain the uniformity of the current.

The possibility of a “pinch-off” of the channel is only a mathematical fiction that essentially derives from a 1-dimensional view of the electrostatics of the problem. In a 1-dimensional view of the Poisson equation, if the depletion layer of the PN junction below the drain becomes equal to the minimum distance between gate and drain the inescapable conclusion is that the N-channel disappears because of “pinch-off”. But the problem is not 1-dimensional as in the PN junction because of the crossed fields produced by Vos and Vcs- A 2-dimensional solution of the Poisson equation is necessary to give a picture as the one shown in figure 7.9.

Furthermore, taking into account only the 2-dimensional nature of the electrostatics is not sufficient to produce the above-mentioned picture. One must take also

The channel region is divided into two sub-regions

FIGURE 7.9 The channel region is divided into two sub-regions: one in which the electric field is low and the potential almost linear and another in which the field is high and in which “pinching” of the channel has occurred.

into account the saturation of the drift velocity with electric field as discussed in section 4.8. In fact, the start of the “residual channel” appears at the distance from the source where the longitudinal electric field equals the electric field that produces velocity saturation. In other words, all electrons inside the residual channel travel at the v* speed discussed in chapter 4. The potential along the residual channel, however, is not constant, in fact it increases at a much faster rate than the roughly linear one prevailing in the non- pinched part of the channel. This is shown in figure 7.9. An initial quantitative analysis of the formation of the “residual channel” was given by Grebene and Ghandhi in 1969 [1], although its existence was postulated much earlier by W. Shockley, one of the inventors of the transistor. As we will see in the next section, the 2-dimensional Poisson equation with no approximations for the charge density can only be solved in conjunction with the continuity and the Schrodinger equations as a system of equations. To analyze the residual channel, Grebene and Ghandhi had to make many approximations and therefore we will not present their analysis. In the next section, we will show how the 2-dimensional potential, charge density, and current density can be deduced by a system of differential equations. The main results of Grebene and Ghandhi are summarized in figure 7.9.

d. Ohmic contacts to source and drain

When metal contacts are made on the source and drain, a metal-semiconductor junction is created, which according to our discussion in section 3.9 is a Schottky diode, i.e. a rectifying junction. No transistor can work having a rectifying diode under the source or drain. Currents need to go in both directions. The problem is resolved by over-doping the semiconductor side of the metal-semiconductor junction, as explained in section 3.9, which substantially increases the tunnelling current from the metal to the semiconductor when the junction is reverse biased.

e. Significance of L, Moore’s Law

The value of the channel length L has a particular significance for the device performance; it is the major factor in determining how quickly the device responds, i.e. the speed of the device. In fact, the driving force behind Moore’s Law is this connection. More than 50 years ago G. Moore, one of the founders of INTEL, predicted that transistor length will shrink every 18-24 months, and this prediction came true. Apart from the obvious advantage of having more memory in the same chip, this miniaturization led to higher device speed because the maximum frequency of operation of a MOSFET fr was proportional to 1/L2 in the initial stages of miniaturization and 1/L later. There is a solid theory of the time dependent MOSFET operation behind all these that we will present later in this chapter, but the basic argument is simple. The response of the device will depend on the time it takes for an electron to transverse it, i.e. travel the distance L of the channel. With devices operating in the saturated velocity regime nowadays, this is equal to LlvM', and the inverse of that gives the 1/L behavior. Devices no longer work at the maximum allowed frequency of a MOSFET due to power dissipation limitations of the whole chip but miniaturization continues according to Moore’s Law. The shortening of the channel length L has however introduced new phenomena some of which can be described within the simple classical theory that we have given so far, without resorting to the systems of differential equations that we are going to give in the next section.

f. Short channel and drain induced barrier lowering (DIBL) effects

If one numerically solves the 2-dimensional Poisson equation (under the approximation of the charge density equal to p = -еЛГд) in two cases a) for a short channel (say L = 50nm) MOSFET and b) a long channel (say L = 1pm) MOSFET, one obtains the following result for the variation of the surface potential Vs (cf equation 7.1), shown in figure 7.10, In this figure, Vs refers to the Fermi level of the source and not to the intrinsic Fermi level of the semiconductor. It can be seen that for a long channel MOSFET the surface potential is constant along the channel, as indeed we have assumed implicitly in our analysis so far. Furthermore, the field due to Vos is appreciable only near the drain end of the channel. On the contrary in the short channel MOSFET the surface potential is not constant and changes along the channel, therefore one should denote it by Vs (x). Furthermore it is reduced by a finite amount from the long channel value. What is this difference due to? In the short channel FET, the source and drain extend significantly in length compared to the channel and are in close proximity to each other and so their depletion regions have a significant effect on the channel and hence on the surface potential. This effect leads to the appearance of a maximum in the potential, as shown in figure 7.10.

The net effect is that the threshold voltage V„, is now a function of the channel length. This is usually called the short channel effect. Furthermore, V,), is reduced by

Variation of the surface potential along the length of its channel for a long and a short channel MOSFET

FIGURE 7.10 Variation of the surface potential along the length of its channel for a long and a short channel MOSFET.

the application of Vos- This is called the drain induced barrier lowering (DIBL) effect. If we call Vo, the threshold voltage of a given FET of channel length L at Vos = 0 we can write the empirical formula

where A is independent of Vos- In addition Vtl (L), as the symbol indicates, varies with L when the latter approaches the sub-micron and nano ranges. From the discussion in the previous paragraph it should be clear that the simple approach presented so far is not adequate and we proceed to a more advanced methodology for the analysis of the MOSFET.

 
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