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: Post-Si FETs


In the previous chapter we have dealt with the Si MOSFET, which is the mainstream device in contemporary electronics, but MOSFETs made out of other materials do exist and in fact may have superior transport properties compared to Si. One such material is GaAs and its alloys, and in general many of the III—V compound semiconductors and their alloys. We have seen in chapter 3 that GaAs is isotropic with an electron effective mass m*„ = 0.067me, which is significantly smaller than both of the two effective masses ml and ml of Si, making GaAs a much faster semiconductor than Si. Of course, the latter has other advantages which explain its use in the electronics industry for the past decades, namely, its availability in nature and the existence of a stable oxide, Si02, which leads to less expensive industrial processes compared to GaAs.

Because of their much better transport properties, the III—V materials constitute the building blocks of a new type of device called High-Electron-Mobility-Transistor (HEMT for short) with superior noise properties compared to Si MOSFETs. This device is suited ideally for high frequency telecommunication circuits. We analyze it first, because of its simplicity compared to the III—V MOSFETs, before we move on to the latter, which are also called quantum-well FETs (QWFETs for short). Finally, we analyze FETs which depart from the planar structure, such as the carbon nanotube FET (or CNTFET).


a. Device Description - Control by the Gate

A simplified picture of a HEMT is shown in figure 8.1. On an undoped substrate of GaAs, a layer of Al, xGaxAs is grown. The index x is usually near x = 0.3. The semiconductor AlbxGaxAs is not uniformly doped but a very small layer, a few Angstroms thick, immediately adjacent to GaAs, is left undoped to reduce the scattering of the channel carriers, as will be explained later. On top of Al,.exGaxAs a metal gate is deposited. The particular choice of III—V semiconductors shown in figure 8.1 is not unique and other pairs of III—V semiconductors with a difference in band-gap Eg are also used. This particular pair corresponds to one of the historically first analyzed

Layout of a III—V HEMT

FIGURE 8.1 Layout of a III—V HEMT.

HEMT devices [1]. As with the Si MOSFET, where the Si/SiO, interface was the determining factor for the working of the device, the important physical phenomena occur in HEMTs at the interface of the two semiconductors. Therefore, we draw in a separate figure 8.2 the junction of the two semiconductors before and after contact.

In figure 8.2a we have on the left an N-type semiconductor (in this case AlGaAs) with a band-gap Eg2 and a Fermi level Ep2 near Ec2, its conduction band edge. On the right we have an intrinsic semiconductor (GaAs in this case) with a band-gap Egl < Eg2 and a Fermi level Ep at mid-gap. When contact of the semiconductors is made, the Fermi levels must be equalized, so electrons from AlGaAs will flow into GaAs. As with the PN and Schottky junctions, this flow of charge will destroy charge neutrality and a built-in potential will result, which will bend the band edges EC1 and £C1. The resulting conduction band edges Ec2 and Ec 1 are shown in figure 8.2b. Note that the spatial direction shown in figure 8.2b is along the depth of the device shown in figure 8.1. An inspection of figure 8.2b shows that a surface layer of electrons is created in the GaAs side of the junction (occupying the energy levels below Ep). If the well that has been formed is very narrow (of the order of a few nanometers), the allowed energy levels become quantized as shown. The electrons that have been assembled in this well form the channel of the HEMT shown in figure 8.1. We can now see the usefulness of the undoped layer in AlGaAs. If ionized donors were present there, they would have

Band structure of (a) isolated N-GaAlAs and of isolated GaAs and (b) of the HEMT when the two pieces make contact with each other

FIGURE 8.2 Band structure of (a) isolated N-GaAlAs and of isolated GaAs and (b) of the HEMT when the two pieces make contact with each other.

Band profile of the metal/N-GaAlAs/GaAs structure

FIGURE 8.3 Band profile of the metal/N-GaAlAs/GaAs structure.

scattered the channel electrons strongly by their long-range Coulombic potential. In fact, the advantage of this device is that only the top layer is doped, so the electrons in the channel flow in an undoped material (GaAs), and therefore their mobility is enhanced—hence the name of the device. Furthermore, GaAs and its alloy GaAlAs have the same crystallographic structure, so their interface is smooth and hence the interfacial scattering is small compared to the Si/Si02 or Si/Hf02 interfaces

When the metal gate is added to the picture, the corresponding band diagram including the Schottky junction below the gate is shown in figure 8.3. On the metal side, Ф;; stands for the Schottky barrier in volts. If a voltage Vb is applied to the gate which has to be negative so that electrons do not leak out of the gate, it can empty or fill the potential well in GaAs. To see how this is done, we have to solve the Poisson equation on the left and right side of the semiconductor interface. The argument is simple but rather long.

Let d be the thickness of the AlGaAs (its extent in the z-direction), and s the thickness of its undoped layer. Poisson’s equation in the AlGaAs layer in one dimension reads

where the point z = 0 is taken to be the interface of the two semiconductors, £2 is the dielectric constant of GaAlAs and

The subscript 2 simply denotes that all quantities refer to the GaAlAs=semiconductor 2. Integrating once from an arbitrary negative point z to 0 we get


Hence we can write

where in 8.2 we have reversed the limit of integration in the RHS of the equation. Integrating a second time between -d and 0 we get

and choosing our zero of energy to be V2 (O) (i.e. V2 (O) = 0) we get

where the 2nd term of the RHS of 8.3 arises from the double integration appearing in the last equation before 8.3. As we have repeatedly stressed, to obtain the potential energy of an electron corresponding to a potential V, one has to multiply by (—e) so that the quantity [-eV2(-d)J, shown in figure 8.3, is

Assuming now that the interface of AlxGabxAs/GaAs is free of charged defects, a reasonable assumption given that the two semiconductors have the same crystallographic structure, the normal component of the dielectric displacement vector D1 is continuous and hence

where £{ (0+) is the electric field infinitesimally inside semiconductor 1 (i.e.GaAs).

We do not have to solve the Poisson equation in GaAs to evaluate £x (0+). The electric field £ (o+) can be obtained easily by the use of Gauss’s law. Imagine a rectangular box extending from infinitesimally to the right of the interface to deep inside GaAs. Electric field lines cross vertically only the plane coinciding with the interface and furthermore the electric field is zero far to the right. Hence if Gauss’s law

is applied to this box, with A the cross-sectional area of the interface we get

where zmax is the maximum depth beyond which ns is practically zero. In the above equation, en(z) stands for the volume density (Cblcm3) and ens is the surface density ('Cblcm2).

From equations 8.4 to 8.6 we obtain where

However, from figure 8.3 we have by summing and equating energy differences on the metal and the semiconductor sides (remember that V2 (0) = 0)

Therefore using equation 8.8 to substitute for V2 (—d)

The above equation is not a direct solution for the required surface density of electrons because the Fermi level Ef is not known. All other quantities are known. In fact, the Fermi level is a function ofns, i.e. EF(ns,T), so equation 8.9 could be solved self-consistently. This can be performed if the integral of the density of states with the Fermi-Dirac probability distribution is evaluated to obtain iteratively ns and EF. Fortunately, a reasonable approximation is available: the quantity EF/e can be neglected compared to other quantities in 8.9 in most cases. We then get the required control relation of the channel by the gate as


It should be obvious that the quantity V0g is the equivalent of V,/, of the MOSFET: no current is possible below Vc = V0ff, in this simplified model. However there is a subthreshold current, as it is called, which is due to diffusion which the following simplified model based on equation 8.10 does not include.

When a voltage Vo is applied between the drain and the source (it is henceforth understood that all voltages refer to the source), a longitudinal electric field £(x) is established along the channel. If this longitudinal field £(x) is small compared to the fields along the transverse z-direction, we can generalize 8.10 to

where Vch(x) is the potential drop along the channel up to the point x, caused by £(x). This approximation is the same we have used for the MOSFET (c.f. equation 7.12) and is usually called the gradual channel approximation. It actually replaces a more rigorous 2-dimensional solution of the Poisson equation by an effective equation of the current in terms of the electron density ns(x). Then, the current ID will be

where W is the width of the device and vdr(x) is the drift velocity of the electrons. Note that to get the current from the current density, we only need to multiply by W because the other dimension of the cross-section area zmax is contained in ns. From equation 8.12 it is obvious that if vdr (x) enters saturation near the drain then the corresponding ns(x) must become a constant, i.e. a residual channel will be created as invoked (but not proved) for the MOSFET.

If £c is the critical value of £(x) at which saturation of velocity occurs at the value Vrfr (x) = vdr we can write

We initially assume that in the linear region of operation, equation 8.13a is valid for all points in the channel. Then, equation 8.12 is transformed into

In equations 8.12 to 8.14 we have neglected the minus signs for both the charge of an electron and the definition of an electric field in terms of the derivative of the potential, so ID denotes the magnitude of current and is positive. Integrating and noting that the current ID is independent of x we get

where L is the length of the channel. We can introduce the ohmic resistances Rs and Rd of the source and drain, respectively, so that we have for VC), (0) and Vch(L)

From equation 8.15 we get

In deriving the above result we assumed the Vch terms to be small compared to 2(Vg — V0ff) in the linear region. Using equations 8.16a and 8.16b we get

Solving for Id

Equation 8.18 has an obvious physical interpretation: if the quotient Vd/Id is to be interpreted as an effective resistance, the latter is the sum of the ohmic resistances plus a channel resistance which depends on VG and goes to infinity as VG —> V0j.

b. Saturation Region

As Vd is increased, so is £(x). There will therefore come a point when at the drain-end of the channel the electric field will become equal to £c. Then the device will enter the saturation regime in accordance with everything we have described for the MOSFET. Note however that the above statement refers to the general features of the saturation regime, but the algebraic expressions for either V0g or Vd", (the saturation voltage) are not the same with the corresponding ones of the MOSFET. Performing the integration in equation 8.15 from V)/, (0) to an arbitrary value Vch(x) where the point x lies before the drain-end of the channel we have


we can get a quadratic equation for Vci, (x). We have

After some trivial algebraic manipulations the determinant of the above equation becomes

Hence the physically acceptable solution of equation 8.19 is

As noted in the beginning of this subsection, pinch-off will occur first at the drain- end of the channel. Hence

The term pinch-off above is used within the context of the previous chapter on the MOSFET, i.e. the depth of the channel never becomes zero, but a very small portion is left open, etc. Differentiating equation 8.20 and assigning

we get

We now restore back in equation 8.21 the values ofC and use 8.13b to substitute the saturation velocity vsi" wherever the product i£c appears. We obtain

The appropriate solution of this quadratic equation is, making the substitution

Vch{0) = lE,Rs>

If £cL2 «:(vG - V0ff -Id'Rs) > i.e. if we have a short channel HEMT, we can simplify equation 8.23 to

The saturation current of the long channel HEMT obeys a different equation. It is left as an exercise for the student to obtain it.

с. АС Analysis

All the machinery we have developed for the AC analysis of the MOSFET equally holds for the HEMT and can be taken over here. In particular, equation 7.60 and the corresponding methodology holds for any three-terminal device with a negligible gate current. So, following equation 7.60 and the approximation 7.61, we obtain the same small-signal equivalent circuit. Following the same path as in equations 7.69 to 7.71 we obtain, as before, the cut-off frequency fr

where CGs stands, as in the MOSFET, for the capacitance linking the gate to the source.

Obtaining an algebraic expression for CGS is not as easy as it was for the MOSFET. A very crude estimate of this capacitance can be obtained by omitting the charges in the top semiconductor. Then we can write

where e2 is the dielectric constant of the top semiconductor and Ad is the distance of the maximum of the channel charge density from the interface. But this is not a reliable expression to calculate fT. Flowever, the value of the fT can be obtained and be related to the length of the channel L by a semi-quantitative argument as follows. This argument is in many respects more general than the above formula. Imagine the electrons crossing the channel. During their flight imagine a sinusoidal change vgs (f) in the external circuit (we are using the notation of section 7.6). If the electrons take a time tp to reach from the source to the drain (i.e. cross the channel) and during that time v^(f) has undergone many cycles, then the electrons will never reach the drain. In other words, the excitations in the external circuit must change in time more slowly than the time required to traverse the channel. We can safely assume that modern FETs operate at saturated velocities, so this tfi time is

and hence

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